Alu register

For an introduction to logic gates, see Redstone circuits/Logic.

Adders[]

Version 1[]

Full Adder

A full adder takes two inputs A and B and a Carry input and produces the Sum and Carry outputs.

It relies on two XOR gates, two AND gates, and one OR gate. With some thought, these gates can be compressed (as both AND and XOR gates already exist in the game, and an OR gate can simply be a redstone wire).

A and B are the bit inputs and C' is the carry in.

Alu components

It produces a sum at S and a carry out at C. When full adder modules are tiled together C' and C will be connected, which allows the carry to propagate to the next module.

Half Adder

The half adder is nearly identical to the full adder, except the second XOR gate is removed and the output from the first XOR gate becomes S.

There is no carry in (C'), but the carry out (C) circuit is still on top of the first XOR gate and provides a carry to the first full adder. Some ALUs will not use a half adder for the first bit, to support INCREMENT (allow a carry in on the first bit).

In-Line Adder[]

alu in minecraft

minecraft alu tutorial